Capacitors are one type of component commonly used in the fabrication of integrated circuits, for example in DRAM circuitry. A capacitor is comprised of two conductive electrodes separated by a non-conducting dielectric region. As integrated circuitry density has increased, there is a continuing challenge to maintain sufficiently high storage capacitance despite typical decreasing capacitor area. The increase in density of integrated circuitry has typically resulted in greater reduction in the horizontal dimension of capacitors as compared to the vertical dimension. In many instances, the vertical dimension of capacitors has increased.
One manner of fabricating capacitors is to initially form an insulative material within which a capacitor storage node electrode is formed. A plurality, or array, of capacitor electrode openings for individual capacitors may be fabricated in such insulative capacitor electrode-forming material, with an example material being silicon nitride and/or silicon dioxide doped with one or both of phosphorus and boron. The capacitor electrode openings are typically formed by etching through openings formed in a mask that is received over the insulative electrode-forming material. The mask is formed, at least in part, using photoresist into which the desired mask openings are formed. Unfortunately, variability in the size of the respective openings across the array can occur and becomes more problematic the smaller the openings and, correspondingly, the closer the openings are spaced.
For example, consider a circular or oval contact opening having a central open diameter of about 55 nanometers. Variability in this dimension of up to 10 to 15 nanometers across the array may be found. This is significant in terms of percentage of the targeted and desired 55 nanometer contact opening size as well as spacing between adjacent of such openings. This can adversely impact techniques used to fabricate the capacitors, and as well induce device differences due to variation in the final capacitor size. Accordingly, it would be desirable to improve upon existing techniques in forming a plurality of openings in a mask for formation of capacitors or other devices, and whether such openings are used for etching, ion implanting, or other processing through the openings relative to substrate material received beneath the mask.